Tandon BIOS POST codes

- Tandon Type A AT 29 Feb 1988 BIOS Post Codes
- Tandon Type B AT 1992 BIOS Post Codes
- Tandon 486 EISA 1989 BIOS Post Codes

Tandon Type A AT 29 Feb 1988 BIOS Post Codes
01 Test 80286 CPU flags and registers
02 Test BIOS ROM checksum
03 Test MC 146818 CMOS RAM battery - real time clock
04 Test 8254 programmable interrupt controller
05 8254 programmable interrupt controller test failed
06 Initialize RAM refresh
07 Test first 16K RAM
08 Initialize cold boot interrupt vectors
09 Test 8259 programmable interrupt controller and interrupt vectors
0A Fill in temporary interrupt vectors
0B Initialize interrupt vector table 1
0C Initialize interrupt vector table 2
0D Initialize fixed disk vector
0E Interrupt vector test failed
0F Clear keyboard controller input buffer
10 Keyboard controller input buffer clearing failed
11 Run keyboard controller self test
12 Initialize equipment check data area
13 Determine presence of and install 80287 math coprocessor
14 Test MC 146818 CMOS RAM disk value range
15 Test for and install parallel port
16 Test for and install serial port
17 Call interrupt 19 boot loader

Tandon Type B AT 1992 BIOS Post Codes
01 Cold boot started
06 Initialize chipset if any
07 Warm boot entry; Start of 8042 keyboard controller self test
08 Part of cold boot keyboard initialization passed
09 Keyboard self test passed; Test CMOS checksum
0A Test CMOS RAM battery
0B Save CMOS RAM battery condition in CMOS diagnostic/status register
0C Finished saving CMOS RAM battery condition
0D Test 8254 programmable interrupt timer; Disable RAM parity, I/O parity, DMA controllers and system speaker; Enable timer channel 2
0E 8254 programmable interrupt timer test failed, xx is the failing channel number
0F Initialize 8254 programmable interrupt timer channels; Conduct memory refresh test
10 Refresh test failed
11 Test base 64K RAM and fill with zeros
12 64K RAM test failed - 3 long beeps and system halt
13 64K RAM test passed
14 Set up stack; Disable mappers for systems that support EMS drivers; Initialize battery beep flag parameters for notebook; Perform read/write test of CMOS RAM; Enable error message if failed
15 CMOS RAM read/write test complete
16 Calculating CPU speed; May set to low if CMOS RAM failed
18 Test and initialize both 8259 programmable interrupt controllers
1A 8259 programmable interrupt controllers initialization complete
1B Install interrupt handler and vector for interrupt 0F to check for unexpected interrupts; Halt is unexpected interrupt occurs
1C Unexpected interrupt did not occur; Test 8254 programmable interrupt timer channel 0, IRQ 0 and software interrupt 8 tests
1D Error; Timer 0 interrupt did not occur when expected, system is halted
1E Both 8259 programmable interrupt controllers passed the tests
20 Set up interrupt vectors 02-1F
21 Set up interrupt vectors 70-77
22 Clear interrupt vectors for 41 and 46
23 Read 8042 keyboard controller self test result; DMA page register channel 2
24 Test for proper 8042 keyboard controller self test result
25 Error; Keyboard controller self test failed; System id halted with message displayed
26 Keyboard controller self test passed
27 Confirm DMA working; Prepare DMA channel 2 for floppy data transfer
28 Reinitialize video
29 Reinitialize video with cursor off
2A Video parameters are initialized
2B Enable NMI and I/O channel check; Disable 8254 programmable interrupt timer channel 2 and speaker
2C Run RAM test to determine size of RAM
2D RAM sizing complete
2E Send reset command to keyboard controller to initialize a keyboard scan cycle
2F Keyboard has been initialized; Initialize CMOS real time clock
30 CMOS real time clock has been initialized; Initialize on board floppy if any
31 Install the hard disk controller
32 Disk controller has been initialized; Prepare DMA channel 2 for floppy transfers
33 Perform equipment check and initialize math coprocessor
34 Install the serial and parallel ports
35 Test CMOS RAM battery
36 Check for keystroke
37 Enable 8254 programmable interrupt timer channel 0 for system tick; Enable keyboard and slave interrupt controller 8259 programmable interrupt controller 2
38 Timer tick, keyboard and 8259 programmable interrupt controller 2 have been initialized; Enable/disable cache through CMOS RAM
39 Enable keyboard interface and interrupts; Go to built in setup program as necessary; Shadow ROM's found
3A Set up complete
3B Test the hard disk and floppy disk
3C Scan for and invoke the adapter ROM's in C800-E000
3D Turn of gate A20; Restore vectors 3bh-3fh with temporary interrupt service routines
3E Gate A20 turned on
3F Call interrupt 19 boot loader

Tandon 486 EISA 1989 BIOS Post Codes
01 Disable cache, enable ROM, high speed on, turn off cache's, disable EISA NMI's, set master/slave IRQ's to edge triggered, disable reset chaining; Disable 82C601 chip
05 Initialize address decoder, 640K RAM; Set BIOS as cacheable, enable extended memory
06 Clear shutdown flag
07 8042 keyboard controller test; Wait till 8042 buffer empty; Disable 8042 command, read 8042 output buffer; Set response ok to DMA page register channel 2
08 Send 8042 keyboard controller NOP command; Get 8042 self test result; Send DMA page register channel 2; If xx=55, then self test ok
09 Test BIOS ROM checksum
0A Read CMOS registers 3 times to clear pending CMOS real time clock interrupts; Disable real time clock interrupts; Check battery
0B Bad CMOS RAM battery
0C Send command to port 61 to disable parity and speaker
0D Test 8254programmable interrupt timer counter
0E One of the counter timers is bad; xx indicates the bad counter
0F Enable and check memory refresh
10 Memory refresh failed
11 Check and clear the first 64K RAM in real mode; Disable NMI; Clear parity latches; Fill 64K with 5555 and check it, then AAA and check it, then 0000
12 First 64K RAM memory test failed
13 First 64K RAM memory test passed
14 Reset the warm boot flag and test CMOS RAM; Turn off caches; Shadow the BIOS; set high speed; Calculate high speed and initialize GP flag; Set low speed and turn off cache if CMOS not good or CMOS speed not high
16 Check shutdown flag 123x
17 Reset was cold boot
18 Prepare 8259 programmable interrupt controllers
19 8259 programmable interrupt controllers initialization failed; Initialize video and display the error message
1A Test 8259 programmable interrupt controller
1B Set interrupt 0F to unexpected interrupt vector; Enable timer and interrupt
1C Set interrupt 08 to timer 0 interrupt vector
1D Timer interrupt did not occur; Initialize video and display error message
1E Initialize interrupt vectors
1F Initialize interrupt vectors 00-6F to temporary interrupt service routines
20 Set vectors for interrupt 02-1F
21 Set interrupt vectors for 70-77, clear vectors 60-67 and 78-FF
22 Clear interrupt vectors for 41 and 46
23 Read 8042 keyboard controller self test results from DMA page register channel 2
24 Test for proper 8042 keyboard controller self test result
25 8042 keyboard controller self test failed
26 Initialize 8042 keyboard controller
27 Check shutdown flag=123x; If no=cold boot
28 If cold boot or CMOS RAM is bad, then install video ROM and initialize video; Initialize equipment flags according to primary video adapter and CMOS RAM content; Initialize POST status
29 If not cold boot and CMOS RAM ok; Install video ROM and initialize video for mono/CGA; Initialize equipment flags according to primary video adapter and CMOS RAM contents
2A Check for bad CMOS RAM
2B Check shutdown flag=123x
2C If cold boot; Turn off caches; Test memory for size and reinitialize cache status
2D Turn off "POST fail" CMOS RAM bit and display and error messages; Initialize keyboard RAM
2E Initialize 8042 keyboard controller and test keyboard
2F Initialize time of day in real time clock
30 Test for and install floppy drive controller
31 Enable 82C601 IDE interface; Test for and install hard disk
32 Test 8259 programmable interrupt controller DMA registers with 55 then AA, then initialize them to 00
33 Test for and initialize math coprocessor
34 Test for and initialize parallel and serial ports
35 Initialize RAM variables for bad CMOS time, date, checksum and battery
36 Wait for user to press Esc or Space; Check for keyboard lock; Clear keyboard lock override; Beep to indicate speed; Display error messages
37 Enable system clock tick (IRQ 0); Enable keyboard (IRQ 1); Enable slave interrupt controller (IRQ 2)
38 Initialize RAM variables for Ctrl-Alt_Esc
39 Enter setup is keystroke pressed
3A Clear screen and update equipment flags according to CMOS RAM contents; Shadow ROM's; Enable/disable cache through CMOS RAM
3B Initialize floppy and hard drives
3C Set POST failed bit in CMOS RAM; Scan for and initialize adapter ROM's
3D Clear the shutdown flag to 0; Disable gate A20 and enable memory wrap in real mode
3E Set vectors for interrupts 3B-3F; Clear post fail bit in CMOS RAM
3F Call interrupt 19 boot loader